Description |
1 online resource (xxviii, 380 pages) |
Contents |
Front Cover; Contents; List of Figures; List of Tables; Preface; About the Authors; Chapter 1: Introduction; Chapter 2: High-Level Modeling and Design Techniques; Chapter 3: Modeling of Scaled MOS Transistor for VLSI Circuit Simulation; Chapter 4: Performance and Feasibility Model Generation Using Learning-Based Approach; Chapter 5: Circuit Sizing and Specification Translation; Chapter 6: Advanced Effects of Scaled MOS Transistors; Chapter 7: Process Variability and Reliability of Nano-Scale CMOS Analog Circuits; Bibliography; Back Cover |
Summary |
Reliability concerns and the limitations of process technology can sometimes restrict the innovation process involved in designing nano-scale analog circuits. The success of nano-scale analog circuit design requires repeat experimentation, correct analysis of the device physics, process technology, and adequate use of the knowledge database. Starting with the basics, Nano-Scale CMOS Analog Circuits: Models and CAD Techniques for High-Level Design introduces the essential fundamental concepts for designing analog circuits with optimal performances. This book explains the links between the physics and technology of scaled MOS transistors and the design and simulation of nano-scale analog circuits. It also explores the development of structured computer-aided design (CAD) techniques for architecture-level and circuit-level design of analog circuits |
Bibliography |
Includes bibliographical references and index |
Notes |
Print version record |
Subject |
Analog CMOS integrated circuits -- Computer-aided design
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Nanoelectronics.
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TECHNOLOGY & ENGINEERING -- Mechanical.
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Nanoelectronics
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Form |
Electronic book
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Author |
Mandal, Chittaranjan, author.
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Patra, Amit, author.
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ISBN |
9781466564282 |
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1466564288 |
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1306501687 |
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9781306501682 |
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9781315216102 |
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1315216108 |
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9781351823302 |
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1351823302 |
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