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E-book
Author Olukotun, Oyekunle Ayinde.

Title Chip multiprocessor architecture : techniques to improve throughput and latency / Kunle Olukotun, Lance Hammond, James Laudon
Edition 1st ed
Published Cham, Switzerland : Springer, ©2007
Online access available from:
Synthesis Digital Library    View Resource Record  

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Description 1 online resource (viii, 145 pages) : color illustrations, digital, PDF file
Series Synthesis lectures on computer architecture ; #3
Synthesis lectures in computer architecture (Online) ; #3.
Contents The case for CMPs -- Improving throughput -- Improving latency automatically -- Improving latency using manual parallel programming -- A multicore world: The future of CMPs
Summary Chip multiprocessors - also called multi-core microprocessors or CMPs for short - are now the only way to build high-performance microprocessors, for a variety of reasons. Large uniprocessors are no longer scaling in performance, because it is only possible to extract a limited amount of parallelism from a typical instruction stream using conventional superscalar instruction issue techniques. In addition, one cannot simply ratchet up the clock speed on today's processors, or the power dissipation will become prohibitive in all but water-cooled systems. Compounding these problems is the simple fact that with the immense numbers of transistors available on today's microprocessor chips, it is too costly to design and debug ever-larger processors every year or two
Notes Title from PDF title page (viewed November 26, 2007)
Bibliography Includes bibliographical references
Subject Parallel processing (Electronic computers)
High performance processors.
Computer architecture.
Computer architecture
High performance processors
Parallel processing (Electronic computers)
Form Electronic book
Author Hammond, Lance Stirling.
Laudon, James P.
ISBN 1598291238
9781598291230
159829122X
9781598291223
9783031017209
303101720X