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Book Cover
E-book
Author Marzuki, Arjuna

Title CMOS Analog and Mixed-Signal Circuit Design Practices and Innovations
Published Milton : Taylor & Francis Group, 2020

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Description 1 online resource (287 p.)
Contents Cover -- Half Title -- Title Page -- Copyright Page -- Table of Contents -- Preface -- Acknowledgments -- Author -- Chapter 1: CMOS Analog and Mixed-Signal Circuit Design: An Overview -- 1.1 Introduction -- 1.2 Notation, Symbol, and Terminology -- 1.3 Technology, Circuit Topology, and Methodology -- 1.4 Analog and Mixed-Signal Integrated Design Concepts -- 1.5 Summary -- Chapter 2: Devices: An Overview -- 2.1 Introduction -- 2.2 The PN Junction -- 2.2.1 Fermi Level -- 2.2.2 Depletion Layer Capacitance -- 2.2.3 Storage Capacitance -- 2.3 Photo Devices -- 2.4 FETs
2.4.1 Long Channel Approximation -- 2.4.1.1 MOS Structure -- 2.4.1.2 MOS with External Bias -- 2.4.1.3 MOS Operation -- 2.4.1.4 Current-Voltage Characteristics -- 2.4.2 MOSFET Scaling -- 2.4.2.1 Full Scaling -- 2.4.2.2 Constant-Voltage Scaling -- 2.4.3 Weak Inversion -- 2.4.4 Short-Channel -- 2.4.4.1 Carrier Drift Velocity Models -- 2.4.4.2 VDSAT -- 2.4.4.3 Current-Voltage Equation for Short Channel Transistor -- 2.4.5 MOSFET Capacitor -- 2.4.5.1 Oxide-Related Capacitance -- 2.4.5.2 Junction Capacitance -- 2.4.6 MOSFET Transition Frequency -- 2.4.7 Noise -- 2.4.7.1 Thermal Noise
2.4.7.2 Flicker Noise -- 2.5 Process Fitting Ratio -- 2.5.1 150-90 nm Design Transfer -- 2.6 MOSFET Parameter Exercise -- 2.7 SPICE Example -- 2.8 Summary -- References -- Chapter 3: Amplifiers -- 3.1 Introduction -- 3.1.1 CMOS Amplifier -- 3.2 Input Voltage Range -- 3.2.1 Theory -- 3.2.2 Example -- 3.3 Signal Path of CMOS Operational Amplifier -- 3.3.1 Overall Signal Path -- 3.3.2 Load -- 3.3.3 Cascode Current Source -- 3.3.4 Example -- 3.4 CMOS Amplifier Parameters -- 3.4.1 Input Offset -- 3.4.2 Common Mode Input Voltage Range -- 3.4.3 Current Consumption
3.4.4 Common Mode Rejection Ratio (CMRR) -- 3.4.5 Power Supply Rejection Ratio -- 3.4.6 Slew Rate and Settling Time -- 3.4.7 DC Gain, fs, and fT -- 3.4.8 Noise -- 3.4.9 Distortion -- 3.5 Common Mode Feedback -- 3.6 Compensation in Amplifier -- 3.6.1 Loop Response -- 3.6.2 Pulse Response -- 3.7 Wideband Amplifier Technique -- 3.7.1 Source and Load -- 3.7.2 Stages and Feedback -- 3.8 Noises in Amplifiers -- 3.8.1 Noise in Circuits -- 3.8.2 Noise in Single-Stage Amplifiers -- 3.8.3 Noise in Differential Pairs -- 3.8.4 Noise in Amplifier with Resistors in the Feedback -- 3.8.5 Noise Bandwidth
3.9 Current Density Design Approach -- 3.10 Layout Examples -- 3.11 Summary -- References -- Chapter 4: Low Power Amplifier -- 4.1 Introduction -- 4.2 Low Voltage CMOS Amplifier -- 4.2.1 Body or Bulk Control -- 4.2.2 Circuit Technique -- 4.3 Subthreshold -- 4.4 Current Reuse CMOS Amplifier -- 4.5 Other Techniques -- 4.5.1 Common-Gate with Gain-Boosting Wideband Differential LNA -- 4.6 Spice Example -- 4.7 Summary -- References -- Chapter 5: Voltage Regulator, References and Biasing -- 5.1 Introduction -- 5.2 Current Sources -- 5.3 Self-Biased -- 5.4 CTAT and PTAT -- 5.5 Bandgap Voltage Reference
Notes Description based upon print version of record
5.5.1 Bandgap Reference
Form Electronic book
ISBN 9781000071511
1000071510