| Description |
1 online resource |
| Series |
The Morgan Kaufmann Series in Computer Architecture and Design ; v. 3 |
|
Morgan Kaufmann Series in Computer Architecture and Design
|
| Contents |
Network Procesor Design Issues and Practices; About the Editors; Table of Contents; Preface; Chapter 1: Network Processors: New Horizons; Chapter 2: Supporting Mixed Real-Time Workloads in Multithreaded Processors with Segmented Instruction Caches; Chapter 3: Efficient Packet Classification with Digest Caches; Chapter 4: Towards a Flexible Netowrk Processor Interface for RapidIO, Hypertransport, and PCI0-Express; Chapter 5: A High-Speed, Multithreaded TCP Offload Engine for 10 Gb/s Ethernet; Chapter 6: A Hardware Platform for Network Intrusion Detection and Prevention |
| Summary |
The past few years have seen significant change in the landscape of high-end network processing. In response to the formidable challenges facing this emerging field, the editors of this series set out to survey the latest research and practices in the design, programming, and use of network processors. Through chapters on hardware, software, performance and modeling, Volume 3 illustrates the potential for new NP applications, helping to lay a theoretical foundation for the architecture, evaluation, and programming of networking processors. Like Volume 2 of the series, Volume 3 further shifts th |
| Notes |
V. 3 |
| Subject |
Network processors -- Design
|
|
Application-specific integrated circuits -- Design
|
|
Application-specific integrated circuits -- Design.
|
| Form |
Electronic book
|
| ISBN |
008051250X |
|
9780080512501 |
|
