| Description |
1 online resource (323 pages) |
| Series |
IEEE Press series |
|
IEEE Press series
|
| Summary |
Discover an up-to-date exploration of Embedded and Fan-Out Waver and Panel Level technologies In Embedded and Fan-Out Wafer and Panel Level Packaging Technologies for Advanced Application Spaces: High Performance Compute and System-in-Package, a team of accomplished semiconductor experts delivers an in-depth treatment of various fan-out and embedded die approaches. The book begins with a market analysis of the latest technology trends in Fan-Out and Wafer Level Packaging before moving on to a cost analysis of these solutions. The contributors discuss the new package types for advanced application spaces being created by companies like TSMC, Deca Technologies, and ASE Group. Finally, emerging technologies from academia are explored. Embedded and Fan-Out Wafer and Panel Level Packaging Technologies for Advanced Application Spaces is an indispensable resource for microelectronic package engineers, managers, and decision makers working with OEMs and IDMs. It is also a must-read for professors and graduate students working in microelectronics packaging research |
| Notes |
Print version record |
| Subject |
Microelectronic packaging.
|
|
Microelectronic packaging
|
| Form |
Electronic book
|
| Author |
Keser, Beth, 1971- editor.
|
|
Kröhnert, Steffen, editor
|
| ISBN |
9781119793847 |
|
111979384X |
|
9781119793892 |
|
1119793890 |
|
9781119793908 |
|
1119793904 |
|
