Title CMOS circuit design, layout, and simulation / R. Jacob Baker, Harry W. Li, David E. Boyce

Published New York : IEEE Press, [1998] ©1998

Copies

Location	Call no.	Vol.	Availability
W'PONDS	621.3815 Bak/Ccd		AVAILABLE

Description xxiv, 902 pages : illustrations ; 24 cm Series IEEE Press series on microelectronic systems IEEE Press series on microelectronic systems. Contents Pt. I. CMOS Fundamentals. Ch. 1. Introduction. Ch. 2. The Well. Ch. 3. The Metal Layers. Ch. 4. The Active and Poly Layers. Ch. 5. The MOSFET. Ch. 6. The BSIM SPICE Model. Ch. 7. CMOS Passive Elements. Ch. 8. Design Verification with LASICKT. Ch. 9. Analog MOSFET Models. Ch. 10. The Digital Model -- Pt. II. CMOS Digital Circuits. Ch. 11. The Inverter. Ch. 12. Static Logic Gates. Ch. 13. The TG and Flip-Flops. Ch. 14. Dynamic Logic Gates. Ch. 15. VLSI Layout. Ch. 16. BiCMOS Logic Gates. Ch. 17. Memory Circuits. Ch. 18. Special-Purpose Digital Circuits. Ch. 19. Digital Phase-Locked Loops -- Pt. III. CMOS Analog Circuits. Ch. 20. Current Sources and Sinks. Ch. 21. References. Ch. 22. Amplifiers. Ch. 23. Feedback Amplifiers. Ch. 24. Differential Amplifiers. Ch. 25. Operational Amplifiers -- Pt. IV. Mixed-Signal Circuits. Ch. 26. Nonlinear Analog Circuits. Ch. 27. Dynamic Analog Circuits. Ch. 28. Data Converter Fundamentals. Ch. 29. Data Converter Architectures App. A. Orbit's CN20 Process -- App. B. MOSIS Scalable Design Rules -- App. C. HP's CMOS14TB Notes "IEEE Circuits & Systems Society, sponsor, IEEE Solid-State Circuits Society, sponsor." Bibliography Includes bibliographical references and index Subject Integrated circuits -- Design and construction. Metal oxide semiconductor field-effect transistors. Metal oxide semiconductors, Complementary -- Design and construction. Author Boyce, David E., 1940- Li, Harry W., 1960- Institute of Electrical and Electronics Engineers. LC no. 97021906 ISBN 0780334167

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