Description |
1 online resource |
Contents |
Introduction -- Security Verification Using Formal Methods -- Simulation-Based Security Validation Approaches -- Security Validation Using Side-Channel Analysis -- Automated Vulnerability Detection And Mitigation -- Conclusion |
Summary |
This book describes a wide variety of System-on-Chip (SoC) security threats and vulnerabilities, as well as their sources, in each stage of a design life cycle. The authors discuss a wide variety of state-of-the-art security verification and validation approaches such as formal methods and side-channel analysis, as well as simulation-based security and trust validation approaches. This book provides a comprehensive reference for system on chip designers and verification and validation engineers interested in verifying security and trust of heterogeneous SoCs. Outlines a wide variety of hardware security threats and vulnerabilities as well as their sources in each of the stages of a design life cycle; Summarizes unsafe current design practices that lead to security and trust vulnerabilities; Covers state-of-the-art techniques as well as ongoing research efforts in developing scalable security validation using formal methods including symbolic algebra, model checkers, SAT solvers, and theorem provers; Explains how to leverage security validation approaches to prevent side-channel attacks; Presents automated debugging and patching techniques in the presence of security vulnerabilities; Includes case studies for security validation of arithmetic circuits, controller designs, as well as processor-based SoCs |
Bibliography |
Includes bibliographical references and index |
Notes |
Online resource; title from PDF title page (SpringerLink, viewed December 2, 2019) |
Subject |
Systems on a chip -- Security measures
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Systems on a chip -- Design
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Electronic circuits
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Electronics
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Microelectronics
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Microprocessors
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Form |
Electronic book
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Author |
Huang, Yuanwen, author
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Mishra, Prabhat, 1973- author.
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ISBN |
9783030305963 |
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3030305961 |
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