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Book Cover
E-book
Author Bae, Woorham

Title Analysis and Design of CMOS Clocking Circuits for Low Phase Noise
Published Stevenage : Institution of Engineering & Technology, 2020

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Description 1 online resource (278 p.)
Series Materials, Circuits and Devices Ser. ; v.59
Materials, Circuits and Devices Ser
Contents Intro -- Contents -- About the authors -- Preface -- Acknowledgments -- 1. Introduction -- 2. Introduction to phase noise and jitter -- 2.1 Definition of jitter -- 2.2 Power spectral density -- 2.3 Phase noise -- 2.4 Relation of phase noise and jitter -- References -- 3. CMOS oscillators -- 3.1 LC oscillator -- 3.2 Ring oscillator -- 3.3 Appendix: Translation of series R-L to parallel R-L -- References -- 4. Phase noise theory for CMOS oscillators -- 4.1 Linear time-invariant phase noise model -- 4.2 Time-varying phase noise model -- References -- 5. Introduction to PLL/DLL
5.1 Applications of PLL/DLL -- 5.2 Building blocks -- 5.3 Fractional-N PLL -- 5.4 False locking and failure issues in PLL/DLL -- References -- 6. PLL loop dynamics and jitter -- 6.1 Transfer function of PLL building blocks -- 6.2 PLL loop dynamics -- 6.3 Supply noise-induced jitter -- Appendix A: Analytic expression of the reference spur -- Appendix B: Why do we use PLL rather than FLL for frequency generation? -- References -- 7. DLL loop dynamics and jitter -- 7.1 DLL basics -- 7.2 DLL jitter -- 7.3 Jitter generation and transfer of open-loop clock buffer
7.4 Design consideration on number of stages and tuning range of DLL -- References -- 8. Phase noise suppression techniques 1: subsampling PLL -- 8.1 Introduction -- 8.2 Subsampling PLL -- 8.3 Fractional-N SS-PLL -- References -- 9. Phase noise suppression techniques 2: all-digital PLL -- 9.1 Introduction -- 9.2 ADPLL building blocks -- 9.3 Quantization noise and jitter -- References -- 10. Phase noise suppression techniques 3: injection locking -- 10.1 Injection locking basics -- 10.2 Jitter transfer of ILO -- 10.3 Subharmonic ILO -- 10.4 ILO circuit implementation -- 10.5 Injection-locked PLL
Summary As electronics continue to become faster, smaller and more efficient, development and research around clocking signals and circuits has accelerated to keep pace. This book bridges the gap between the classical theory of clocking circuits and recent technological advances
Notes Description based upon print version of record
Form Electronic book
Author Jeong, Deog-Kyoon
ISBN 9781785618024
1785618024