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Author Goossens, Sven, author

Title Memory controllers for mixed-time-criticality systems : architectures, methodologies and trade-offs / Sven Goossens, Karthik Chandrasekar, Benny Akesson, Kees Goossens
Published Switzerland : Springer, [2016]
Online access available from:
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Description 1 online resource (xxvii, 202 pages)
Series Embedded systems, 2193-0163
Embedded systems (Springer (Firm)). 2193-0163
Contents Introduction -- Reconfigurable Real-Time Memory Controller Architecture -- Memory Patterns -- Cycle-Accurate SDRAM Power Modeling -- Power/Performance Trade-Offs -- Conservative Open-Page Policy -- Reconfiguration -- Related Work -- Conclusions and Future Work -- Appendix A: ILP Problem Formation -- Appendix B: Memory Specifications -- Appendix C: Code Listings -- Appendix D: List of Acronyms -- Appendix E: List of Symbols
Summary This book discusses the design and performance analysis of SDRAM controllers that cater to both real-time and best-effort applications, i.e. mixed-time-criticality memory controllers. The authors describe the state of the art, and then focus on an architecture template for reconfigurable memory controllers that addresses effectively the quickly evolving set of SDRAM standards, in terms of worst-case timing and power analysis, as well as implementation. A prototype implementation of the controller in SystemC and synthesizable VHDL for an FPGA development board are used as a proof of concept of the architecture template
Bibliography Includes bibliographical references
Notes Online resource; title from PDF title page (EBSCO, viewed April 19, 2016)
Subject Embedded computer systems -- Programming.
Dynamic random access memory.
Programmable controllers.
Real-time data processing.
Form Electronic book
Author Chandrasekar, Karthik, author
Goossens, Kees, author
Ã…kesson, Benny, 1977- author
ISBN 3319320939 (print)
3319320947 (electronic bk.)
9783319320939 (print)
9783319320946 (electronic bk.)